;**** includes ****
.include "m8535def.inc"
; Output immediate   outi	port,var
.macro	outi
	ldi	r16,@1
	out	@0,r16
.endm
;	ldiw	Z(X,Y),var
.macro	ldiw
	ldi	@0L,low(@1)
	ldi	@0H,high(@1)
.endm
;*****************************
;* レジスタ変数　設定 *
;*****************************
.def	temp1	= r16
.def	temp2	= r17
.def	temp3	= r18
.def	led_p	= r19
.def	led_n	= r20
.def	led_c	= r21
.def	th		= r22	
.def	tm		= r23
.def	ts		= r24
.def	tc		= r25

.def	led_dat	= r15
.def	led_h	= r14
.def	led_l	= r13
.def	mode	= r12
.def	key		= r11
.def	keyb	= r10
;.def	keyc	= r9
.def	al_h	= r8
.def	al_m	= r7
;use r0,r1,r2

;*****************************
;*　 ビット　設定　　*
;*****************************
;**  PORTA  ***
.equ	sw1 = 0
.equ	sw2 = 1
.equ	sw3 = 2
;.equ		= 3
;.equ	 	= 4
;.equ		= 5
.equ	bz  = 6
;.equ		= 7   ADC_7
;**  PORTB  ***
;LED列制御上位
;**  PORTC  ***
;LED列制御下位
;**  PORTD  ***
;LED列データ

.dseg
dsp_dat:	.byte  82
;*********************
;* 割込みベクター *
;*********************
.cseg
	RJMP	 start	 	;各種ﾘｾｯﾄ
	reti	;RJMP	 EXT_INT0	;外部割り込み要求0
	reti	;RJMP	 EXT_INT1	;外部割り込み要求1
	reti	;RJMP	 TIM2_COMP	;ﾀｲﾏ/ｶｳﾝﾀ2 比較一致
	reti	;RJMP	 TIM2_OVF	;ﾀｲﾏ/ｶｳﾝﾀ2 ｵｰﾊﾞｰﾌﾛｰ
	reti	;RJMP	 TIM1_CAPT	;ﾀｲﾏ/ｶｳﾝﾀ1 捕獲発生
	RJMP	 TIM1_COMPA	;ﾀｲﾏ/ｶｳﾝﾀ1 比較A一致
	reti	;RJMP	 TIM1_COMPB	;ﾀｲﾏ/ｶｳﾝﾀ1 比較B一致
	reti	;RJMP	 TIM1_OVF	;ﾀｲﾏ/ｶｳﾝﾀ1 ｵｰﾊﾞｰﾌﾛｰ
	reti	;RJMP	 TIM0_OVF	;ﾀｲﾏ/ｶｳﾝﾀ0 ｵｰﾊﾞｰﾌﾛｰ
	reti	;RJMP	 SPI_STC	;SPI転送完了
	reti	;RJMP	 UART_RXC	;UART受信完了
	reti	;RJMP	 UART_DRE	;UART送信ﾊﾞｯﾌｧ空
	reti	;RJMP	 UART_TXC	;UART送信完了
	reti	;RJMP	 ADC	 	;A/D変換完了
	reti	;RJMP	 EE_RDY	 	;EEPROM操作可
	reti	;RJMP	 ANA_COMP	;ｱﾅﾛｸﾞ比較器出力遷移
	reti	;RJMP	 TWI	 ;2線ｼﾘｱﾙ ｲﾝﾀｰﾌｪｰｽ状態変化
	reti	;RJMP	 EXT_INT2	 ;外部割り込み要求2
	reti	;RJMP	 TIM0_COMP	 ;ﾀｲﾏ/ｶｳﾝﾀ0 比較一致
	reti	;RJMP	 SPM_RDY	 ;SPM命令操作可
;*********************
;* メイン プログラム *
;*********************
start:
	LDI	 R16,HIGH(RAMEND)	;RAM最終ｱﾄﾞﾚｽ上位を取得
	OUT	 SPH,R16	 		;ｽﾀｯｸ ﾎﾟｲﾝﾀ上位を初期化
	LDI	 R16,LOW(RAMEND)	;RAM最終ｱﾄﾞﾚｽ下位を取得
	OUT	 SPL,R16	 		;ｽﾀｯｸ ﾎﾟｲﾝﾀ下位を初期化

i_o_reset:
	ldi	temp1,0b00011111	
	out	PORTA,temp1	; pa0-4 pull up,pa5-6 clear
	ldi	temp1,0b01100000
	out	DDRA,temp1	; pa5-6 out port,pa0-4 in port,pa7 adc
	ldi	temp1,0	
	out	PORTB,temp1	; pb0~7 clear
	ldi	temp1,0xff
	out	DDRB,temp1	; pb0~7 out port
	ldi	temp1,0	
	out	PORTC,temp1	; pc0~7 clear
	ldi	temp1,0xff
	out	DDRC,temp1	; pc0~7 out port
	ldi	temp1,0	
	out	PORTD,temp1	; pd0~7 clear
	ldi	temp1,0xff
	out	DDRD,temp1	; pd0~7 out port

ADC_set:
	outi	ADMUX,0b00000111 ;Ch7(pa7)選択
	outi	ADCSR,(1<<ADEN)|(1<<ADPS2)|(1<<ADPS1)	;ADC_ck 8M/64=125k
timer1_set:
	outi	TIMSK,1<<OCIE1A	;タイマ１比較A一致割込み許可
	outi	TCCR1B,(1<<CTC1)|(1<<CS10)	;タイマ１比較A一致後クリア、TCK=CK
	outi	OCR1AH,high(10002)	;割込み周期　1.25ms
	outi	OCR1AL, low(10002)	;1.25ms/(1/8M)=10,000
	outi	TCNT1H,0
	outi	TCNT1L,0
	clr	led_dat
	clr	led_l
	sec
	ror	led_h
	clr led_n
	clr led_c
	clr	led_p
	ldi th,21 ;clr	th
	ldi tm,15 ;clr tm
	clr ts
	clr tc
	clr	mode
	clr al_h
	clr	al_m
	rcall kye_clr
	ldiw x,dsp_dat
	clr	temp2
t1_0:
	st	x+,led_p	;dsp_dat[0-21]=0
	inc	temp2
	cpi	temp2,22
	brne	t1_0
	adiw xl,12	
	ldiw z,co*2
t1_1:
	lpm
	st	x+,r0
	adiw zl,1
	inc	temp2
	cpi	temp2,25
	brne	t1_1
	adiw xl,12	
	ldiw z,sp*2
t1_2:
	lpm
	st	x+,r0
	adiw zl,1
	inc	temp2
	cpi	temp2,35
	brne	t1_2
	adiw xl,12	
	ldiw z,do*2
t1_3:
	lpm
	st	x+,r0
	adiw zl,1
	inc	temp2
	cpi	temp2,41
	brne	t1_3
	sei

main:
	sbrc key,2
	rjmp main_1
main_0:
	sbrs key,2
	rjmp main_0	
	ldi temp1,0x80
	eor mode,temp1
	sbrs mode,7
	rjmp al_off0
al_on:
	ldiw z,al*2
	rjmp al_dsp
al_off0:
	ldiw z,sp*2
al_dsp:
	ldiw x,dsp_dat+16
	ldi temp1,6
al_dsp1:
	lpm
	st	x+,r0
	adiw zl,1
	dec	temp1
	brne al_dsp1

main_1:
	sbrc key,0
	rjmp	main
adj:
	clr	led_p
	ldi temp1,1
	or mode,temp1	;adj mode set
	ldiw x,dsp_dat
	clr r2
	ldiw z,ti*2
	ldi temp1,6
adj_m:
	lpm
	st	x+,r0
	adiw zl,1
	dec	temp1
	brne adj_m
	ldi	temp1,10
	clr	r0
adj_m1:	
	st	x+,r0
	dec	temp1
	brne adj_m1
adj_m2:
	sbrs key,0
	rjmp	adj_m2 
adj_m3:
	sbrs key,0
	rjmp adj_1
	sbrs key,2
	rjmp adj_m31
	sbrc key,1
	rjmp	adj_m3
	clr temp1
	rjmp	adj_m35
adj_m31:
	ldi	temp1,6
adj_m35:
	mov r2,temp1
	clr r0
	ldiw z,ti*2
	add	zl,temp1
	adc zh,r0
	ldiw x,dsp_dat
	ldi temp1,6
adj_m4:
	lpm
	st	x+,r0
	adiw zl,1
	dec	temp1
	brne adj_m4
	rjmp adj_m3
adj_1:
	rcall kye_clr
	ldiw x,dsp_dat+12
	ldiw z,co*2
	lpm
	st	x+,r0
	adiw zl,1
	lpm
	st	x,r0
	sbrc r2,1
	rjmp adj_al0
adj_ti0:
	rcall kye_clr
	ldiw x,dsp_dat
	mov temp3,th
	rcall	t_dsp
adj_ti2:
	sbrs key,0
	rjmp adj_ti_m
	sbrs key,1
	rjmp adj_tip
	sbrs key,2
	rjmp adj_tim
	rjmp adj_ti2	
adj_tip:
	inc	th
	cpi	th,24
	brcs adj_ti0
	clr	th
	rjmp adj_ti0
adj_tim:
	dec	th
	brpl adj_ti0
	ldi	th,23
	rjmp adj_ti0
adj_ti_m:
	rcall kye_clr
	ldiw x,dsp_dat
	ldiw z,co*2
	lpm
	st	x+,r0
	adiw zl,1
	lpm
	st	x+,r0
	clr	r0
	st	x,r0
adj_ti_m0:
	rcall kye_clr
adj_ti_m1:
	ldiw x,dsp_dat+3
	mov temp3,tm
	rcall	t_dsp_m
adj_ti_m2:
	sbrs key,0
	rjmp adj_ti_s
	sbrs key,1
	rjmp adj_timp
	sbrs key,2
	rjmp adj_timm
	rjmp adj_ti_m2
adj_timp:
	inc	tm
	cpi	tm,60
	brcs adj_ti_m0
	clr	tm
	rjmp adj_ti_m0
adj_timm:
	dec	tm
	brpl adj_ti_m0
	ldi	tm,59
	rjmp adj_ti_m0
adj_ti_s:
	clr	ts
	clr	tc
	rjmp main_e
adj_al0:
	rcall kye_clr
	ldiw x,dsp_dat
	mov temp3,al_h
	rcall	t_dsp
adj_al2:
	sbrs key,0
	rjmp adj_al_m
	sbrs key,1
	rjmp adj_alp
	sbrs key,2
	rjmp adj_alm
	rjmp adj_al2	
adj_alp:
	inc	al_h
	ldi	temp1,24
	cp	al_h,temp1
	brcs adj_al0
	clr	al_h
	rjmp adj_al0
adj_alm:
	dec	al_h
	brpl adj_al0
	ldi temp1,23
	mov	al_h,temp1
	rjmp adj_al0
adj_al_m:
	rcall kye_clr
	ldiw x,dsp_dat
	ldiw z,co*2
	lpm
	st	x+,r0
	adiw zl,1
	lpm
	st	x+,r0
	clr	r0
	st	x,r0
adj_al_m0:
	rcall kye_clr
	ldiw x,dsp_dat+3
	mov temp3,al_m
	rcall	t_dsp_m
adj_al_m2:
	sbrs key,0
	rjmp main_e
	sbrs key,1
	rjmp adj_almp
	sbrs key,2
	rjmp adj_almm
	rjmp adj_al_m2
adj_almp:
	inc	al_m
	ldi temp1,60
	cp	al_m,temp1
	brcs adj_al_m0
	clr	al_m
	rjmp adj_al_m0
adj_almm:
	dec	al_m
	brpl adj_al_m0
	ldi	temp1,59
	mov al_m,temp1
	rjmp adj_al_m0
main_e:
	rcall kye_clr
	ldiw x,dsp_dat
	ldi temp1,16
	clr r0
main_e1:
	st	x+,r0	;dsp_dat[0-15]=0
	dec	temp1
	brne main_e1
	ldi temp1,0x80
	and mode,temp1	;adj mode clr
	rjmp	main

TIM1_COMPA:
	push	temp1
	push	temp2
	push	r0
	in r0,sreg
	push r0	
	sbi	PORTA,5	;clock test
	ldiw y,dsp_dat
	mov temp1,led_p	;pointer 
	add	temp1,led_n
	cpi temp1,77
	brcs t_c0
	subi temp1,77
t_c0:
	clr	temp2
	add	yl,temp1
	adc	yh,temp2
	ld	led_dat,y
	out	PORTB,led_h
	out	PORTC,led_l
	out	PORTD,led_dat
	inc led_n
	lsr	led_h
	ror	led_l
	brcc t_c1
	ror	led_h
	clr led_n
	inc	tc
	inc led_c
	cpi	led_c,10	;1.25msx16x10=200ms
	brne	t_c1
	clr	led_c
key_in:
	in	temp1,PINA
	andi	temp1,0x07
	cp	keyb,temp1
	brne	key1
	mov	key,temp1
	clr keyb
	rjmp	keye
key1:
	mov keyb,temp1	
keye:
	sbrc mode,0
	rjmp	t_c1
	inc led_p
	cpi	led_p,77
	brne	al_ck
	clr	led_p
al_ck:
	sbrs mode,7
	rjmp al_off
	cp	th,al_h
	brne al_off
	cp tm,al_m
	brne al_off
	sbic PINA,6
	rjmp al_off
	sbi PORTA,6
	rjmp t_c1
al_off:		
	cbi PORTA,6
t_c1:
	cpi	tc,50;1.25msx16x50=1s
	breq t_c2
	rjmp t_ce
t_c2:
	clr	tc
	inc	ts
	cpi	ts,60
	brne	t_d
	clr	ts
	inc	tm
	cpi	tm,60
	brcs	t_d
	clr	tm
	inc	th
	cpi	th,24
	brcs	t_d
	clr	th
t_d:
	sbrc mode,0
	rjmp	t_ce
	ldiw x,dsp_dat+22
	mov temp3,th
	rcall	t_dsp
	adiw xl,3
	mov temp3,tm
	rcall	t_dsp_m
	rcall temp_read
	rcall dnum
	tst	r0
	brne t_d7
	ldiw z,sp*2
	rjmp t_d8
t_d7:
	;mul	r0,temp2(6)
	lsl r0
	mov	r1,r0
	lsl r0
	add r1,r0
	ldiw z,num0*2
	clr temp1
	add	zl,r1
	adc	zH,temp1
t_d8:
	ldiw x,dsp_dat+59
	ldi temp2,6
t_d9:
	lpm
	st	x+,r0
	adiw zl,1
	dec	temp2
	brne t_d9
	ldi temp2,6
	;mul	temp3x6
	lsl temp3
	mov r1,temp3
	lsl temp3
	add r1,temp3
	ldiw z,num0*2
	clr temp1
	add	zl,r1
	adc	zH,temp1
t_d10:
	lpm 
	st	x+,r0
	adiw zl,1
	dec	temp2
	brne t_d10
t_ce:
	cbi	PORTA,5
	pop	r0
	out	sreg,r0
	pop r0
	pop	temp2
	pop	temp1
	reti

t_dsp:
	rcall dnum
	tst	r0
	brne t_dsp1
	ldiw z,sp*2
	rjmp t_dsp2
t_dsp1:
	;mul	r0,temp2(6)
	lsl r0
	mov	r1,r0
	lsl r0
	add r1,r0
	ldiw z,num0*2
	clr temp1
	add	zl,r1
	adc	zH,temp1
t_dsp2:

	ldi temp2,6
t_dsp3:
	lpm
	st	x+,r0
	adiw zl,1
	dec	temp2
	brne t_dsp3
  	ldi temp2,6
	;mul	temp3,temp2
	lsl temp3
	mov r1,temp3
	lsl temp3
	add r1,temp3
	ldiw z,num0*2
	clr temp1
	add	zl,r1
	adc	zH,temp1
t_dsp4:
	lpm 
	st	x+,r0
	adiw zl,1
	dec	temp2
	brne t_dsp4
	ret
t_dsp_m:
	rcall dnum
	ldi temp2,6
	;mul	r0,temp2
	lsl r0
	mov	r1,r0
	lsl r0
	add r1,r0
	ldiw z,num0*2
	clr temp1
	add	zl,r1
	adc	zH,temp1
t_dsp5:
	lpm
	st	x+,r0
	adiw zl,1
	dec	temp2
	brne t_dsp5
	ldi temp2,6
	;mul	temp3,temp2
	lsl temp3
	mov r1,temp3
	lsl temp3
	add r1,temp3
	ldiw z,num0*2
	clr temp1
	add	zl,r1
	adc	zH,temp1
t_dsp6:
	lpm	
	st	x+,r0
	adiw zl,1
	dec	temp2
	brne t_dsp6
	ret


dnum:
	clr r0
dnum0:
	subi	temp3,10
	brcs	dnum1
	inc r0
	rjmp dnum0
dnum1:
	subi	temp3,-10
	ret

temp_read:
	sbi ADCSR,ADIF	;Reset interrupt flag
 	sbi	ADCSR,ADSC	;Start A/D conversion
temp_read1:	
 	sbis ADCSR,ADIF
 	rjmp temp_read1
	in	yL,ADCL	;
	in	yH,ADCH	;
temp_1:
	ldiw z,sp*2
temp_2:
	ldi temp2,6
	ldiw x,dsp_dat+53
temp_3:
	lpm
	st x+,r0
	adiw zl,1
	dec temp2
	brne temp_3
	clr temp3
	adiw yl,5
temp_4:
	subi yl,10
	sbci yh,0
	brcs temp_5
	inc temp3
	rjmp temp_4
temp_5:
	ret
kye_clr:
	clr key
	dec key ;($ff)
	ret

led_pata:
num0:	.db	126,129,129,129,126,0,  0,65,255,1, 0,   0,67,133,137,145,97,  0,66,129,145,145,110, 0,28,36,68,255,4,0
num5:	.db	242,145,145,145,14, 0,126,145,145,145,14,0,192,128,143,144,224,0,110,145,145,145,110,0,98,145,145,145,126,0
co:		.db	108,108,0,0
sp:		.db 0,0,0,0,0,0
do:		.db 64,30,33,33,33,0
mi:		.db 0,16,16,16,16,0
ti:		.db 128,240,128,15,0,0
al:		.db 112,160,119,1,1,0
zard:	.db	134,138,146,162,194,0,62,72,136,72,62,0,254,144,152,148,98,0,254,130,130,68,56,0
love:	.db	0,0,0,254,2,2,2,2,0,28,34,34,34,28,0,56,4,2,4,56,0,28,42,42,42,24,0,56,68,66,33,66,68,56,0,0


