;**** includes **** 
.include "M169DEF.INC"

.macro char_set
	ldi		temp1,@0
	subi	temp1,'a'
	lsl		temp1
	clr		temp2
	ldi		ZL,low(a*2)
	ldi		ZH,high(a*2)
	add		ZL,temp1
	adc		ZH,temp2
	LPM		temp2,Z+	;data L
	LPM		temp4,Z+	;data H
.endmacro

.def	temp1=r16
.def	temp2=r17
.def	temp3=r18
.def	temp4=r19

.cseg
;*********************
;* 割込みベクター *
;*********************
	 	 RJMP	 RESET	 ;各種ﾘｾｯﾄ
	 	 reti;	JMP	 EXT_INT0	 ;外部割り込み要求0
	 	 reti;	JMP	 PCINT0	 ;ﾋﾟﾝ変化割り込み要求0
	 	 reti;	JMP	 PCINT1	 ;ﾋﾟﾝ変化割り込み要求1
	 	 reti;	JMP	 TIM2_COMP	 ;ﾀｲﾏ/ｶｳﾝﾀ2 比較一致
	 	 reti;	JMP	 TIM2_OVF	 ;ﾀｲﾏ/ｶｳﾝﾀ2 ｵｰﾊﾞｰﾌﾛｰ
	 	 reti;	JMP	 TIM1_CAPT	 ;ﾀｲﾏ/ｶｳﾝﾀ1 捕獲(ｷｬﾌﾟﾁｬ)発生
	 	 reti;	JMP	 TIM1_COMPA	 ;ﾀｲﾏ/ｶｳﾝﾀ1 比較A一致
	 	 reti;	JMP	 TIM1_COMPB	 ;ﾀｲﾏ/ｶｳﾝﾀ1 比較B一致
	 	 reti;	JMP	 TIM1_OVF	 ;ﾀｲﾏ/ｶｳﾝﾀ1 ｵｰﾊﾞｰﾌﾛｰ
	 	 reti;	JMP	 TIM0_COMP	 ;ﾀｲﾏ/ｶｳﾝﾀ0 比較一致
	 	 reti;	JMP	 TIM0_OVF	 ;ﾀｲﾏ/ｶｳﾝﾀ0 ｵｰﾊﾞｰﾌﾛｰ
	 	 reti;	JMP	 SPI_STC	 ;SPI転送完了
	 	 reti;	JMP	 USART_RXC	 ;USART 受信完了
	 	 reti;	JMP	 USART_UDRE	 ;USART 送信ﾊﾞｯﾌｧ空
	 	 reti;	JMP	 USART_TXC	 ;USART 送信完了
	 	 reti;	JMP	 USI_STRT	 ;USI 開始条件検出
	 	 reti;	JMP	 USI_OVF	 ;USI ｶｳﾝﾀ ｵｰﾊﾞｰﾌﾛｰ
	 	 reti;	JMP	 ANA_COMP	 ;ｱﾅﾛｸﾞ比較器出力遷移
	 	 reti;	JMP	 ADC_	 ;ADC変換完了
	 	 reti;	JMP	 EE_RDY	 ;EEPROM操作可
	 	 reti;	JMP	 SPM_RDY	 ;SPM命令操作可
	 	 reti;	JMP	 LCD_SOF	 ;LCDﾌﾚｰﾑ開始

RESET:
	LDI	 R16,HIGH(RAMEND)	;RAM最終ｱﾄﾞﾚｽ上位を取得
	OUT	 SPH,R16	 ;ｽﾀｯｸ ﾎﾟｲﾝﾀ上位を初期化
 	LDI	 R16,LOW(RAMEND)	;RAM最終ｱﾄﾞﾚｽ下位を取得
	OUT	 SPL,R16	 ;ｽﾀｯｸ ﾎﾟｲﾝﾀ下位を初期化
	
	ldi temp1,0xff
	out	PORTB,temp1
	ldi temp1,0x00
	out	DDRB,temp1
	ldi temp1,0xff
	out	PORTE,temp1
	ldi temp1,0x00
	out	DDRE,temp1


LCD_INI:
	 LDI	 temp1,(1<<LCDMUX1)|(1<<LCDMUX0)|(1<<LCDPM2)|(1<<LCDPM1)|(1<<LCDPM0)	;cl=8MHz、1/3ﾊﾞｲｱｽ、1/4ﾃﾞｭｰﾃｨ
	 STS	 LCDCRB,temp1	 ;25seg use
	 LDI	 temp1,(1<<LCDPS2)|(1<<LCDPS1)|(1<<LCDPS0)|(1<<LCDCD2)|(1<<LCDCD0)	
	 STS	 LCDFRR,temp1	 ;前置4096分周、ｸﾛｯｸ分周6分周によりﾌﾚｰﾑﾚｰﾄ41Hz設定
	 LDI	 temp1,(1<<LCDDC2)|(1<<LCDDC0)|(1<<LCDCC3)|(1<<LCDCC2)|(1<<LCDCC1)
	 STS	 LCDCCR,temp1	 ;850μs駆動、出力電圧3.3V設定
	 LDI	 temp1,(1<<LCDEN)	 ;LCD許可、標準波形、割り込み禁止
	 STS	 LCDCRA,temp1 

main:
	char_set 'k'
	rcall k_2
	char_set 'u'
	rcall k_3
	char_set 'n'
	rcall k_4
	char_set 'i'
	rcall k_5
	char_set 'o'
	rcall k_6
	char_set 'z'+1 ;*
	rcall k_7
loop:
	in r20,PINB
	andi r20,0b11010000; bit 6:up,7:down,4:center
	in r21,PINE
	andi r21,0b00000110; bit 3:right,3:left
    or	r21,r20
	ldi temp1,20
	rcall wait_ms
	in r20,PINB
	andi r20,0b11010000; bit 7:up,6:down,4:center
	in r19,PINE
	andi r19,0b00000110; bit 3:right,2:left
    or	r19,r20
	cp	r19,r21
	breq	key_in
	rjmp	loop
key_in:
	sbrs	r19,6
	rjmp	key_up
	sbrs	r19,7
	rjmp	key_down
	sbrs	r19,4
	rjmp	key_center
	sbrs	r19,2
	rjmp	key_right
	sbrs	r19,1
	rjmp	key_left
	rjmp 	loop

key_up:
	lds		temp1,LCDCCR
	mov		temp2,temp1
	andi	temp2,0xf0
	andi	temp1,0x0f
	inc		temp1
	andi	temp1,0x0f
	brne	key_up1
	ldi 	temp1,0x0f
key_up1:
	or		temp1,temp2
	sts		LCDCCR,temp1
	rjmp	key_end
key_down:
	lds		temp1,LCDCCR
	mov		temp2,temp1
	andi 	temp2,0xf0
	andi	temp1,0x0f
	dec		temp1
	brpl	key_down1
	clr 	temp1
key_down1:
	or		temp1,temp2
	sts		LCDCCR,temp1
	rjmp	key_end
key_center:
	lds		temp1,LCDCCR
	andi	temp1,0x0f
	ori		temp1,0xa0
	sts		LCDCCR,temp1
	rjmp	key_end
key_right:
	lds		temp1,LCDCCR
	andi	temp1,0x0f
	ori		temp1,0xc0
	sts		LCDCCR,temp1
	rjmp	key_end
key_left:
	lds		temp1,LCDCCR
	andi	temp1,0x0f
	ori		temp1,0x40
	sts		LCDCCR,temp1
key_end:
	ldi 	temp1,250
	rcall	wait_ms
	rjmp	loop
	

k_2:
	ldi		YL,low(LCDDR0)	;桁2　
	ldi		YH,high(LCDDR0)	
	rcall	k_246
	ret
k_3:
	ldi		YL,low(LCDDR0)	;桁3
	ldi		YH,high(LCDDR0)	
	rcall	k_357
	ret
k_4:
	ldi		YL,low(LCDDR1)	;桁4　
	ldi		YH,high(LCDDR1)	
	rcall	k_246
	ret
k_5:
	ldi		YL,low(LCDDR1)	;桁5
	ldi		YH,high(LCDDR1)	
	rcall	k_357
	ret
k_6:
	ldi		YL,low(LCDDR2)	;桁6
	ldi		YH,high(LCDDR2)	
	rcall	k_246
	ret
k_7:
	ldi		YL,low(LCDDR2)	;桁7
	ldi		YH,high(LCDDR2)	
	rcall	k_357
	ret

K_246:
	mov		temp1,temp2
	swap 	temp2
	andi	temp1,0x0f
	andi	temp2,0x0f
	mov		temp3,temp4
	swap 	temp4
	andi	temp3,0x0f
	andi	temp4,0x0f
	ldd		r20,Y+15
	andi	r20,0xf0
	or		r20,temp4
	std		Y+15,r20
	ldd		r20,Y+10
	andi	r20,0xf0
	or		r20,temp3
	std		Y+10,r20
	ldd		r20,Y+5
	andi	r20,0xf0
	or		r20,temp2
	std		Y+5,r20
	ld		r20,Y
	andi	r20,0xf0
	or		r20,temp1
	st		Y,r20
	ret

K_357:
	mov		temp1,temp2
	swap 	temp1
	andi	temp1,0xf0
	andi	temp2,0xf0
	mov		temp3,temp4
	swap 	temp3
	andi	temp3,0xf0
	andi	temp4,0xf0
	ldd		r20,Y+15
	andi	r20,0x0f
	or		r20,temp4
	std		Y+15,r20
	ldd		r20,Y+10
	andi	r20,0x0f
	or		r20,temp3
	std		Y+10,r20
	ldd		r20,Y+5
	andi	r20,0x0f
	or		r20,temp2
	std		Y+5,r20
	ld		r20,Y
	andi	r20,0x0f
	or		r20,temp1
	st		Y,r20
	ret

wait_ms:			;temp1　ms
	ldi	temp2,125	;64*125=8000clocks
wait_ms_01:
	ldi	temp3,15    ;1clocks  4*(15+1)=64
wait_ms_02:
	nop					; 1clocks
	dec	temp3			; 1clocks
	brne	wait_ms_02	; 2clocks
	dec	temp2			; 1clocks
	brne	wait_ms_01	; 2clocks
	dec	temp1			; 1clocks	
	brne	wait_ms		; 2clocks
	ret

num: .dw	0x5559,0x0118,0x1e11,0x1b11,0x0b50,0x1b41,0x1f41,0x0111,0x1f51,0x1b51 
             ;0     1       2    3      4      5      6       7      8      9
a: 	.dw    0x0f51,0x3991,0x1441,0x3191,0x1e41,0x0e41,0x1d41,0x0f50,0x2080,0x1510,0x8648
	        ;'A'   ;'B'   ;'C'    ;'D'  ;'E'   ;'F'   ;'G'   ;'H'   ;'I'   ;'J'   ;'K'
l: 	.dw    0x1440,0x0578,0x8570,0x1551,0x0e51,0x9551,0x8e51,0x9021,0x2081,0x1550,0x4448
            ;'L'   ;'M'   ;'N'   ;'O'   ;'P'   ;'Q'   ;'R'   ;'S'   ;'T'   ;'U'   ;'V'
w: 	.dw    0xc550,0xc028,0x2028,0x5009,0xeAA8,0x2A80,0x0A00,0x0A51
            ;'W'   ;'X'   ;'Y'   ;'Z'   ;'*'   ;'+'   ;'-'   ;'°' 


