;**** includes **** .include "1200def.inc" ;***************************** .def c = r16 .def c1 = r17 .def d1 = r18 .def d2 = r19 .def temp1 = r20 .def temp2 = r21 .def temp3 = r22 .def temp4 = r23 .def c2 = r24 .def c3 = r25 .def d3 = r26 .def d4 = r27 ;** PORTB *** ; k1 =0 ; k2 =1 ; k3 =2 ; k4 =3 ; k5 =4 ; k6 =5 ; k7 =6 ; k8 =7 ;** PORTD ** ; k9 =0 ; k10 =1 ; k11 =2 ; k12 =3 ; k13 =4 ; k10+ =5 .equ cr =6 ;********************* .cseg rjmp start ; Reset Handle reti reti reti ;********************* start: ldi temp1,0 out DDRB,temp1 ; pb0~7 in port ldi temp1,0xff ; pb0~7 pull up out PORTB,temp1 ldi temp1,0x40 out DDRD,temp1 ; pd0~5 in port ,6out port ldi temp1,0x3f ; pd0~5 pull up out PORTD,temp1 ; pd6 clear ldi c3,255 rjmp main1 main: ldi temp1,200 rcall wait_ms ldi temp1,200 rcall wait_ms main0: dec c3 brne main1 ldi temp1,0x01 out WDTCR,temp1 wdr ldi temp1,0x09 out WDTCR,temp1 ldi temp1,0x30 out MCUCR,temp1 sleep main1: ldi temp4,0x3f in c,PINB in c1,PIND com c com c1 mov d1,c and temp4,c1 mov d2,temp4 or c,temp4 breq main0 ldi temp1,30 rcall wait_ms ldi temp4,0x3f in c,PINB in c1,PIND com c com c1 cp d1,c brne main0 and temp4,c1 cp d2,temp4 brne main0 clr c1 andi temp4,0x20 breq key0 ldi c1,13 key0: inc c1 lsr d2 ror d1 brcc key0 key1: cpi c1,0x01 brne key2 ldi d1,0x43 ldi d2,0x21 rcall sousin rjmp main key2: cpi c1,0x02 brne key3 ldi d1,0x43 ldi d2,0x22 rcall sousin rjmp main key3: cpi c1,0x03 brne key4 ldi d1,0x43 ldi d2,0x23 rcall sousin rjmp main key4: cpi c1,0x04 brne key5 ldi d1,0x43 ldi d2,0x24 rcall sousin rjmp main key5: cpi c1,0x05 brne key6 ldi d1,0x03 ldi d2,0x17 rcall sousin rjmp main key6: cpi c1,0x06 brne key7 ldi d1,0x43 ldi d2,0x25 rcall sousin rjmp main key7: cpi c1,0x07 brne key8 ldi d1,0x43 ldi d2,0x26 rcall sousin rjmp main key8: cpi c1,0x08 brne key9 ldi d1,0x43 ldi d2,0x27 rcall sousin rjmp main key9: cpi c1,0x09 brne key10 ldi d1,0x43 ldi d2,0x21 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x25 rcall sousin rjmp main key10: cpi c1,10 brne key11 ldi d1,0x03 ldi d2,0x1e rcall sousin rjmp main key11: cpi c1,11 brne key12 ldi d1,0x43 ldi d2,0x29 rcall sousin rjmp main key12: cpi c1,12 brne key13 ldi d1,0x43 ldi d2,0x21 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x33 rcall sousin rjmp main key13: cpi c1,13 brne key14 ldi d1,0x43 ldi d2,0x21 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x21 rcall sousin rjmp main key14: cpi c1,14 brne key15 ldi d1,0x43 ldi d2,0x21 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x22 rcall sousin rjmp main key15: cpi c1,15 brne key16 ldi d1,0x03 ldi d2,0x1f rcall sousin rjmp main key16: cpi c1,16 brne key17 ldi d1,0x43 ldi d2,0x21 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x26 rcall sousin rjmp main key17: cpi c1,17 brne key18 ldi d1,0x43 ldi d2,0x21 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x27 rcall sousin rjmp main key18: cpi c1,18 brne key19 ldi d1,0x43 ldi d2,0x22 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x33 rcall sousin rjmp main key19: cpi c1,19 brne key20 ldi d1,0x43 ldi d2,0x22 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x28 rcall sousin rjmp main key20: cpi c1,20 brne key21 ldi d1,0x43 ldi d2,0x22 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x29 rcall sousin rjmp main key21: cpi c1,21 brne key22 ldi d1,0x43 ldi d2,0x23 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x33 rcall sousin rjmp main key22: cpi c1,22 brne key23 ldi d1,0x43 ldi d2,0x23 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x21 rcall sousin rjmp main key23: cpi c1,23 brne key24 ldi d1,0x43 ldi d2,0x23 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x22 rcall sousin rjmp main key24: cpi c1,24 brne key25 ldi d1,0x43 ldi d2,0x23 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x23 rcall sousin rjmp main key25: cpi c1,25 brne key99 ldi d1,0x43 ldi d2,0x23 rcall sousin ldi temp1,150 rcall wait_ms ldi d1,0x43 ldi d2,0x24 rcall sousin rjmp main key99: rjmp main sousin: mov d3,d1 mov d4,d2 ldi c2,5 sbit: ldi c,255 pulse_s: ldi temp1,8 sbi PORTD,cr rcall wait_us ldi temp1,17 cbi PORTD,cr rcall wait_us dec c brne pulse_s sbit1: ldi c,87 pulse_s1: ldi temp1,8 sbi PORTD,cr rcall wait_us ldi temp1,17 cbi PORTD,cr rcall wait_us dec c brne pulse_s1 ldi temp1,45 rcall wait_100us data: ldi c1,0 data1: lsr d2 ror d1 brcs iti zero: ldi c,21 pulse_z: ldi temp1,8 sbi PORTD,cr rcall wait_us ldi temp1,17 cbi PORTD,cr rcall wait_us dec c brne pulse_z ldi temp1,56 rcall wait_10us rjmp data3 iti: ldi c,21 pulse_i: ldi temp1,8 sbi PORTD,cr rcall wait_us ldi temp1,17 cbi PORTD,cr rcall wait_us dec c brne pulse_i ldi temp1,168 rcall wait_10us data3: inc c1 cpi c1,16 brne data1 stbit: iti1: ldi c,21 pulse_i1: ldi temp1,8 sbi PORTD,cr rcall wait_us ldi temp1,17 cbi PORTD,cr rcall wait_us dec c brne pulse_i1 ldi temp1,168 rcall wait_10us ldi temp1,22 rcall wait_ms dec c2 breq exit mov d1,d3 mov d2,d4 rjmp data exit: ret ;base 4MHz wait_us: nop ; 1clocks dec temp1 ; 1clocks brne wait_us ; 2clocks ret wait_10us: ;temp1x10us 40clocks ldi temp2,9 wait_10us1: nop ; 1clocks dec temp2 ; 1clocks brne wait_10us1 ; 2clocks nop ; 1clocks dec temp1 ; 1clocks brne wait_10us ; 2clocks ret wait_100us: ;temp1x100us 400clocks ldi temp2,99 wait_us_01: nop ; 1clocks dec temp2 ; 1clocks brne wait_us_01 ; 2clocks nop ; 1clocks dec temp1 ; 1clocks brne wait_100us ; 2clocks ret wait_ms: ;temp1@ms ldi temp2,125 wait_ms_01: ldi temp3,7 wait_ms_02: nop ; 1clocks dec temp3 ; 1clocks brne wait_ms_02 ; 2clocks nop ; 1clocks dec temp2 ; 1clocks brne wait_ms_01 ; 2clocks dec temp1 ; 1clocks brne wait_ms ; 2clocks ret