;**** includes **** 2012/04/38 ck=8Mhz xtal
.include "m88pdef.inc"
.MACRO	mul16s	;mul16s ra,rb,rc,rd  ;r0:r1:r2:r3=ra:rb*rc:rd
		;work	r4,r5

	clr	r0
	clr	r1
	clr	r2
	clr	r3
	clr	r4
	clr	r5 ;

	tst	@0
	brpl	f_1
	neg	@1
	sbc	r4,@0
	mov	@0,r4
	clr 	r4
	inc	r5
f_1:	tst	@2
	brpl	f_0
	neg	@3
	sbc	r4,@2
	mov	@2,r4
	clr	r4
	dec	r5
f_0:
	push	@3
	push	@0
	push	@1
A_BLs:
	lsr	@3
	brcc	A_BLs1
	add	r3,@1
	adc	r2,@0
	adc	r1,r4
A_BLs1:
	tst	@3
	breq	A_BHs
	lsl	@1
	rol	@0
	rol	r4
	rjmp	A_BLs
	
A_BHs:
	pop	@1
	pop	@0
	pop	@3
	clr	r4	
A_BHs1:
	lsr	@2
	brcc	A_BHs2
	add	r2,@1
	adc	r1,@0
	adc	r0,r4
A_BHs2:
	tst	@2
	breq	mul16es
	lsl	@1
	rol	@0
	rol	r4
	rjmp	A_BHs1
mul16es:
	tst	r5
	breq	mul16es1
	clr	r5
	neg	r3
	sbc	r5,r2
	mov	r2,r5
	clr	r5
	sbc	r5,r1
	mov	r1,r5
	clr	r5
	sbc	r5,r0
	mov	r0,r5
mul16es1:
.ENDMACRO
.macro	ldiw	;	ldiw	Z(X,Y),var
	ldi	@0L,low(@1)
	ldi	@0H,high(@1)
.endm
.macro	stsi
	ldi	r16,@1
	sts	@0,r16
.endm
.macro	sti
	ldi	r16,@1
	st	@0,r16
.endm
.MACRO subi16	;subi16	ra,rb,0xHHHH
                 subi	@1,low(@2)
                 sbci	@0,high(@2)
.ENDMACRO 
.MACRO cpi16	;cpi16	ra,rb,0xHHHH	;ra:rb-0xHHHH	set flags:N,C
		push	@0
		push	@1
		subi	@1,low(@2)
		sbci	@0,high(@2)
cp162:	pop	@1
		pop	@0
.ENDMACRO
.MACRO subi24	;subi24	ra,rb,rc,0xHHHHHH
                 subi	@2,low(@3)
                 sbci	@1,high(@3)
                 sbci	@0,byte3(@3)
.ENDMACRO 
.MACRO cpi24	;cpi24	ra,rb,rc,0xHHHHHH	;ra:rb:rc-0xHHHHHH	set flags:N,C
		push	@0
		push	@1
		push	@2
		subi	@2,low(@3)
		sbci	@1,high(@3)
		sbci	@0,byte3(@3)
		pop	@2
		pop	@1
		pop	@0
.ENDMACRO
;*****************************
;* レジスタ変数　設定 *
;*****************************
;work  r0-r8,r
.def	temp1	= r16
.def	temp2	= r17
.def	temp3	= r18
.def	temp4	= r19
;work	r20-r22 
.def	lcd_data= r23
.def	n	= r24
.def	m	= r25
;*****************************
;*　 ビット　設定　　*
;*****************************
;**  PORTC  ***
.equ	v_in	= 0
.equ	i_in	= 1
;.equ		= 2
;.equ		= 3
;.equ		= 4
;.equ		= 5 
;.equ		= 7 
;**  PORTB  ***
.equ	lcd_rs	= 0
.equ	lcd_rw	= 1
.equ	lcd_enb	= 2
;.equ		= 3;mosi
.equ	ck	= 4;miso
;.equ		= 5;sck 
;.equ		= 6;xtal1
;.equ		= 7;xtal2
;**  PORTD  ***
;.equ		= 0; Rx
;.equ		= 1; Tx
;.equ		= 2
;.equ		= 3
.equ	lcd_db4 = 4
.equ	lcd_db5 = 5
.equ	lcd_db6 = 6
.equ	lcd_db7 = 7

.dseg
dsp_dat:.byte  32
Vt:	.byte  2*4
It:	.byte  2*4
Vc:	.byte  2*2
Ic:	.byte  2*2
V:	.byte  2
I:	.byte  2
P:	.byte  4
Q:	.byte  4

;.eseg	;EEPROM add
.cseg
	 	 rjmp	RESET   ;各種ﾘｾｯﾄ
	 	 reti  ;rjmp	 EXT_INT0	 ;外部割り込み要求0
	 	 reti  ;rjmp	 EXT_INT1	 ;外部割り込み要求1
	 	 reti  ;rjmp	 PCINT0		 ;ﾋﾟﾝ変化割り込み要求0
	 	 reti  ;rjmp	 PCINT1	 	;ﾋﾟﾝ変化割り込み要求1
	 	 reti  ;rjmp	 PC_INT2	 ;ﾋﾟﾝ変化割り込み要求2
	 	 reti  ;rjmp	 WDT_OVF	 ;ｳｫｯﾁﾄﾞｯｸﾞ計時完了
	 	 reti  ;rjmp	 TIM2_COMPA	 ;ﾀｲﾏ/ｶｳﾝﾀ2比較A一致
	 	 reti  ;rjmp	 TIM2_COMPB	 ;ﾀｲﾏ/ｶｳﾝﾀ2比較B一致
	 	 reti  ;rjmp	 TIM2_OVF	 ;ﾀｲﾏ/ｶｳﾝﾀ2溢れ
	 	 reti  ;rjmp	 TIM1_CAPT	 ;ﾀｲﾏ/ｶｳﾝﾀ1捕獲発生
	 	 rjmp	 TIM1_COMPA	 ;ﾀｲﾏ/ｶｳﾝﾀ1比較A一致
	 	 reti  ;rjmp	 TIM1_COMPB	 ;ﾀｲﾏ/ｶｳﾝﾀ1比較B一致
	 	 reti  ;rjmp	 TIM1_OVF	 ;ﾀｲﾏ/ｶｳﾝﾀ1溢れ
	 	 reti  ;rjmp	 TIM0_COMPA	 ;ﾀｲﾏ/ｶｳﾝﾀ0比較A一致
	 	 reti  ;rjmp	 TIM0_COMPB	 ;ﾀｲﾏ/ｶｳﾝﾀ0比較B一致
	 	 reti  ;rjmp	 TIM0_OVF	 ;ﾀｲﾏ/ｶｳﾝﾀ0溢れ
	 	 reti  ;rjmp	 SPI_STC	 ;SPI転送完了
	 	 reti  ;rjmp	 USART_RXC	 ;USART 受信完了
	 	 reti  ;rjmp	 USART_UDRE	 ;USART 送信ﾊﾞｯﾌｧ空
	 	 reti  ;rjmp	 USART_TXC	 ;USART 送信完了
	 	 reti  ;rjmp	 ADC_	 	;ADC変換完了
		 reti  ;rjmp	 EE_RDY	 	;EEPROM操作可
	 	 reti  ;rjmp	 ANA_COMP	 ;ｱﾅﾛｸﾞ比較器出力遷移
	 	 reti  ;rjmp	 TWI	 	;2線直列ｲﾝﾀｰﾌｪｰｽ状態変化
	 	 reti  ;rjmp	 SPM_RDY	 ;SPM命令操作可
RESET:
	ldi	R16,HIGH(RAMEND)	;RAM最終ｱﾄﾞﾚｽ上位を取得
	out	SPH,R16	 ;ｽﾀｯｸ ﾎﾟｲﾝﾀ上位を初期化
	ldi	R16,LOW(RAMEND)	;RAM最終ｱﾄﾞﾚｽ下位を取得
	out	SPL,R16	 ;ｽﾀｯｸ ﾎﾟｲﾝﾀ下位を初期化

start:
;	ldi	r16,0x80	;set cpu clk 4MHz
;	sts	CLKPR,r16
;	ldi	r16,0x01	;1/2		
;	sts	CLKPR,r16

	ldi	temp1,0b11110010
	out	DDRD,temp1	; pd0,2,3 in port,4-7 out
	ldi	temp1,0b00001100; pd2,3 pull up,4-7 clr	
	out	PORTD,temp1
	
	ldi	temp1,0x3f
	out	DDRB,temp1	; pb0~5 out port
	ldi	temp1,0x00	; pb0~5 clear	
	out	PORTB,temp1

	ldi	temp1,0xfc	
	out	PORTC,temp1	; pc2~7 pull up
	ldi	temp1,0
	out	DDRC,temp1	; pc2~7 in port,pc0,1 adc

		;test:
		;sbi	PORTB,ck	;2
		;nop				;1
		;nop				;1
		;cbi	PORTB,ck	;2
		;rjmp test		;2
;rjmp t0
; LCD - Initialize LCD controller
lcd_init:
	ldi	temp1,15	; wait for 15+ms
	rcall	wait_ms		; /
	rcall	lcd_int		; /
	ldi	temp1,5		; Wait for 4.1ms+
	rcall	wait_ms		; /
	rcall	lcd_int		; /
	ldi	temp1,100 	;wait for 100us+
	rcall	wait_us		; /
	rcall	lcd_int		; /
	ldi	lcd_data,0x20
	rcall	lcd_cmd
	ldi	temp1,100 		;wait for 100us+
	rcall	wait_us			; /
	ldi	lcd_data,0x28	; Data=4bit, Line=2, Font=5x7
	rcall	lcd_cmd			; /
	ldi	lcd_data,0x0c	; Display=ON, Cursor=OFF, Blink=OFF
	rcall	lcd_cmd			; /
	ldi	lcd_data,6		; Increment, No shift
	rcall	lcd_cmd			; /
	ldi	lcd_data,1		; clear ,homepos
	rcall	lcd_cmd
	ldi	lcd_data,0x84
 	rcall	lcd_cmd
	ldi	lcd_data,'O'
	rcall	lcd_dsp
	ldi	lcd_data,'K'
	rcall	lcd_dsp
;t0:
USATR_int:
	stsi	UBRR0H,0		
	stsi	UBRR0L,25		;8MHz/[(25+1)x16]-->19200Hz
	stsi	UCSR0A,0		;受信完了フラグリセット
	stsi	UCSR0B,(1<<RXEN0)|(1<<TXEN0);RXEN0：受信許可、TXEN0：送信許可
	stsi	UCSR0C,(1<<UCSZ01)|(1<<UCSZ00);ビット長８bit、ストップビット１bit、非同期動作
ADC_set:
	stsi	ADCSRA,(1<<ADEN)|(1<<ADPS2)|(1<<ADPS1)	;ADC_ck 8M/64=125k
	stsi	ADMUX,0b01000000 ;基準電圧AVcc,Ch0選択

	clr m
	clr n
	sts V,n
	sts V+1,n
	sts I,n
	sts I+1,n
	sts	P,n
	sts	P+1,n
	sts P+2,n
	sts P+3,n
	sts	Q,n
	sts	Q+1,n
	sts Q+2,n
	sts Q+3,n
	ldiw y,Vt
	ldiw z,It
	ldi temp1,'W'
	sts	dsp_dat+6,temp1
	ldi temp1,'V'
	sts	dsp_dat+13,temp1
	ldi temp1,'a'
	sts	dsp_dat+14,temp1
	ldi temp1,'r'
	sts	dsp_dat+15,temp1
	ldi temp1,'V'
	sts	dsp_dat+22,temp1
	ldi temp1,'.'
	sts	dsp_dat+26,temp1
	sts	dsp_dat+20,temp1
	ldi temp1,'A'
	sts	dsp_dat+29,temp1
	ldi temp1,' '
	sts	dsp_dat+7,temp1
	sts	dsp_dat+16,temp1
	sts	dsp_dat+23,temp1
timer1_set:
	stsi	TIMSK1,1<<OCIE1A	;タイマ１比較A一致割込み許可
	stsi	TCCR1B,(1<<WGM12)|(1<<CS10)	;タイマ１比較A一致後クリア、TCK=CK
	stsi	OCR1AH,high(33333)	;割込み周期　4.16ms (1s/60) / (90/360)
	stsi	OCR1AL, low(33333)	;(1s/60/4)/(1/8M)=33333.3
	stsi	TCNT1H,0
	stsi	TCNT1L,0
	sei


main:

	rjmp main


TIM1_COMPA:
	sbi	PORTB,ck
	cpi	m,4
	brcs	a_in	;m=0,1,2,3
	brne	n150
	rjmp	m4	;m=4
n150:
	cpi	n,19	;m>4 
	breq	n15
	ldi temp1,1
	rcall wait_ms
	rjmp	T_C_e0 ;n<>19
n15:	;m>4 & n=19
	 cpi	m,5
	 brne n15_1	 
	 rjmp	n15m5	;m=5
n15_1:
	 cpi	m,6
	 brne n15_2
	 rjmp	n15m6	;m=6
n15_2:
	 cpi	m,7
	 brne n15_3
	 rjmp	n15m61	;m=7
n15_3:
	 cpi	m,8
	 brne n15_4
	 rjmp	n15m7	;m=8
n15_4:
	 cpi	m,9
	 brne n15_5
	 rjmp	n15m8	;m=9
n15_5:	 	 
	cpi	m,11
	 brne n15_6	
	 rjmp	n15m14	;m=11
 n15_6:
	 rjmp T_C_e1
a_in:	
	stsi	ADMUX,0b01000001 ;基準電圧AVcc,Ch1選択 I in
	;Reset interrupt flag,Start A/D conversion
	ldi	r16,(1<<ADEN)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADSC)|(1<<ADIF)
	sts	ADCSRA,r16
read_i:	
	lds	r0,ADCSRA
	sbrs	r0,ADIF
	rjmp	read_i
	lds	temp1,ADCL
	lds	temp2,ADCH
	subi16	temp2,temp1,512
	st	z+,temp1
	st	z+,temp2

	ldi temp1,1
	rcall wait_ms
	ldi temp1,255
	rcall wait_us
	ldi temp1,255
	rcall wait_us	;about 33deg

	stsi	ADMUX,0b01000000 ;基準電圧AVcc,Ch0選択 V in
	;Reset interrupt flag,Start A/D conversion
	ldi	r16,(1<<ADEN)|(1<<ADPS2)|(1<<ADPS1)|(1<<ADSC)|(1<<ADIF)
	sts	ADCSRA,r16
read_v1:	
	lds	r0,ADCSRA
	sbrs	r0,ADIF
	rjmp	read_v1
	lds	temp1,ADCL
	lds	temp2,ADCH
	subi16	temp2,temp1,512
	st	y+,temp1
	st	y+,temp2

	rjmp T_C_e1

m4:
;	V cal   V*4 <=sqrt(V0^2+V1^2)
	lds	temp1,Vt	;Vt0L
	lds	temp2,Vt+1	;Vt0H
	lds	temp3,Vt+4	;Vt2L
	lds	temp4,Vt+5	;Vt2H
	sub	temp3,temp1	;Vt2-Vt0
	sbc	temp4,temp2
	sts	Vc,temp3	;Vc0L
	sts	Vc+1,temp4	;Vc0H
	push	temp4
	push	temp3
	lds	temp1,Vt+2	;Vt1L
	lds	temp2,Vt+3	;Vt1H
	lds	temp3,Vt+6	;Vt3L
	lds	temp4,Vt+7	;Vt3H
	sub	temp3,temp1	;Vt3-Vt1
	sbc	temp4,temp2
	sts	Vc+2,temp3	;Vc1L
	sts	Vc+3,temp4	;Vc1H
	pop	temp1
	pop	temp2
	mov	r15,temp2
	mov	r14,temp1	
	mul16s	temp2,temp1,r15,r14	;mul16s ra,rb,rc,rd  ;r0:r1:r2:r3=ra:rb*rc:rd
	mov	r15,temp4
	mov	r14,temp3
	mov	r13,temp4
	mov	r12,temp3
;	mov	temp1,r0	;r0=0
	mov	temp2,r1
	mov	temp3,r2
	mov	temp4,r3
	mul16s	r15,r14,r13,r12
	add	temp4,r3
	adc	temp3,r2
	adc	temp2,r1
	clr	temp1		;r0=0
	rcall	sqrt32		;sqrt(r16:r17:r18:r19)=r0:r1
	lds	temp1,V		;VL
	lds	temp2,V+1	;VH
	add	temp1,r1
	adc	temp2,r0
	sts	V,temp1
	sts	V+1,temp2
;	I cal   I*20 <=sqrt(I0^2+I1^2)
	lds	temp1,It	;It0L
	lds	temp2,It+1	;It0H
	lds	temp3,It+4	;It2L
	lds	temp4,It+5	;It2H
	sub	temp3,temp1	;It2-It0
	sbc	temp4,temp2
	sts	Ic,temp3	;Ic0L
	sts	Ic+1,temp4	;Ic0H
	push	temp4
	push	temp3
	lds	temp1,It+2	;It1L
	lds	temp2,It+3	;It1H
	lds	temp3,It+6	;It3L
	lds	temp4,It+7	;It3H
	sub	temp3,temp1	;It3-It1
	sbc	temp4,temp2
	sts	Ic+2,temp3	;Ic1L
	sts	Ic+3,temp4	;Ic1H
	pop	temp1
	pop	temp2
	mov	r15,temp2
	mov	r14,temp1	
	mul16s	temp2,temp1,r15,r14
	mov	r15,temp4
	mov	r14,temp3
	mov	r13,temp4
	mov	r12,temp3
;	mov	temp1,r0	;r0=0
	mov	temp2,r1
	mov	temp3,r2
	mov	temp4,r3
	mul16s	r15,r14,r13,r12
	add	temp4,r3
	adc	temp3,r2
	adc	temp2,r1
	clr	temp1		;r0=0
	rcall	sqrt32		;sqrt(r16:r17:r18:r19)=r0:r1
	lds	temp1,I		;IL
	lds	temp2,I+1	;IH
	add	temp1,r1
	adc	temp2,r0
	sts	I,temp1
	sts	I+1,temp2
	;P cal  V1*I1+V0*I0=P*80=(V*4)*(I*20)
	lds	r12,P
	lds	r13,P+1
	lds	r14,P+2
	lds	r15,P+3
	lds	temp1,Vc+2	;Vc1L
	lds	temp2,Vc+3	;Vc1H
	lds	temp3,Ic+2	;Ic1L
	lds	temp4,Ic+3	;Ic1H
	mul16s	temp4,temp3,temp2,temp1	;V1*I1
	add	r12,r3
	adc	r13,r2
	adc	r14,r1
	adc r15,r0
	lds	temp1,Vc	;Vc0L
	lds	temp2,Vc+1	;Vc0H
	lds	temp3,Ic	;Ic0L
	lds	temp4,Ic+1	;Ic0H
	mul16s	temp4,temp3,temp2,temp1	;V0*I0
	add	r12,r3
	adc	r13,r2
	adc	r14,r1
	adc r15,r0
	sts	P,r12
	sts	P+1,r13
	sts	P+2,r14
	sts	P+3,r15
	;Q cal  V0*I1-V1*I0=Q*80=(V*4)*(I*20)
	lds	r12,Q
	lds	r13,Q+1
	lds	r14,Q+2
	lds	r15,Q+3
	lds	temp1,Vc	;Vc0L
	lds	temp2,Vc+1	;Vc0H
	lds	temp3,Ic+2	;Ic1L
	lds	temp4,Ic+3	;Ic1H
	mul16s	temp4,temp3,temp2,temp1	;V0*I1
	add	r12,r3
	adc	r13,r2
	adc	r14,r1
	adc r15,r0
	lds	temp1,Vc+2	;Vc1L
	lds	temp2,Vc+3	;Vc1H
	lds	temp3,Ic	;Ic0L
	lds	temp4,Ic+1	;Ic0H
	mul16s	temp4,temp3,temp2,temp1	;V1*I0
	sub	r12,r3
	sbc	r13,r2
	sbc	r14,r1
	sbc r15,r0
	sts	Q,r12
	sts	Q+1,r13
	sts	Q+2,r14
	sts	Q+3,r15
	rjmp T_C_e1
n15m5:
	lds	temp1,V
	lds	temp2,V+1	;4V*20=80V
	ldi	temp3,4		;端数切上
	clr temp4
	add	temp1,temp3
	adc	temp2,temp4
	lsr	temp2
	ror	temp1
	lsr	temp2
	ror	temp1
	lsr	temp2
	ror	temp1	;temp2:temp1=80V/8=10V
	rcall bindec40	;bin:=temp2:temp1  dec=r1,r2,r3,r4
	ldiw	z,dsp_dat+17
	tst		r1
	brne	n15m5_1
	ldi		temp1,0x20
	rjmp	n15m5_2
n15m5_1:
	ldi	temp1,0x30
	add	temp1,r1
n15m5_2:
	st z+,temp1	;100
	tst r2
	brne	n15m5_3
	or	r1,r2
	brne	n15m5_3
	ldi		temp1,0x20
	rjmp	n15m5_4
n15m5_3:
	ldi	temp1,0x30
	add	temp1,r2
n15m5_4:
	st z+,temp1	;10
	ldi	temp1,0x30
	add	temp1,r3  
	st z+,temp1	;1
	adiw zl,1
	ldi	temp1,0x30
	add	temp1,r4
	st z+,temp1	;1/10

	lds	temp1,I
	lds	temp2,I+1	;20I*20=4*100I
	clr	temp4
	ldi	temp3,2		;端数切上
	add	temp1,temp3
	adc	temp2,temp4
	lsr	temp2
	ror	temp1
	lsr	temp2
	ror	temp1	;temp2:temp1=400I/4=100I
	rcall bindec40	;bin:=temp2:temp1  dec=r1,r2,r3,r4
	adiw zl,2
	tst	r1
	brne	n15m5_5
	ldi		temp1,0x20
	rjmp	n15m5_6
n15m5_5:
	ldi	temp1,0x30
	add	temp1,r1
n15m5_6:
	st z+,temp1		;十位
	ldi	temp1,0x30
	add	temp1,r2
	st z+,temp1		;一位
	adiw zl,1
	ldi	temp1,0x30
	add	temp1,r3
	st z+,temp1		;1/10位
	ldi	temp1,0x30
	add	temp1,r4
	st z+,temp1		;1/100位

	lds	temp1,P
	lds	temp2,P+1	
	lds	temp3,P+2	
	lds	temp4,P+3	;80P*20=16*100P
	clr r20
	tst	temp4
	breq	n15m5_61
	neg	temp1
	sbc	r20,temp2
	mov temp2,r20
	clr r20
	sbc r20,temp3
	mov temp3,r20
	clr r20
	sbc r20,temp4
	mov temp4,r20
	ldi r20,1
n15m5_61:
	ldi	r21,low(800)
	ldi	r22,high(800)	;端数切上
	clr temp4
	add	temp1,r21
	adc	temp2,r22
	adc	temp3,temp4
    lsr temp3
	ror	temp2
	ror temp1
    lsr temp3
	ror	temp2
	ror temp1
    lsr temp3
	ror	temp2
	ror temp1
    lsr temp3
	ror	temp2
	ror temp1		;temp3:2:1=1600P/16=100P
	rcall bindec60	;bin:=temp3:temp2:temp1  dec=r5:r0:r1:r2,r3,r4
	ldiw	z,dsp_dat
	ldi		temp1,' '
	tst		r20
	breq	n15m5_62
	ldi		temp1,'-'
n15m5_62:
	st z+,temp1		;符号
	mov temp2,r5
	cpi	temp2,10
	brcs	n15m5_7
	subi	temp2,10
	ldi		temp1,'1'
	rjmp	n15m5_8
n15m5_7:
	ldi		temp1,0x20
n15m5_8:
	st z+,temp1		;万位
	or r5,temp2
	brne	n15m5_9
	ldi		temp1,0x20
	rjmp	n15m5_a
n15m5_9:	
	ldi	temp1,0x30
	add	temp1,temp2
n15m5_a:
	st z+,temp1		;千位
	or r5,r0
	brne	n15m5_b
	ldi		temp1,0x20
	rjmp	n15m5_c
n15m5_b:	
	ldi	temp1,0x30
	add	temp1,r0
n15m5_c:
	st z+,temp1		;百位
	or r5,r1
	brne	n15m5_d
	ldi		temp1,0x20
	rjmp	n15m5_e
n15m5_d:
	ldi	temp1,0x30
	add	temp1,r1
n15m5_e:
	st z+,temp1		;十位
	ldi	temp1,0x30
	add	temp1,r2
	st z+,temp1		;一位

	lds	temp1,Q
	lds	temp2,Q+1	
	lds	temp3,Q+2	
	lds	temp4,Q+3	;80Q*20=16*100Q
	clr r20
	tst	temp4
	breq	n15m5_g
	neg	temp1
	sbc	r20,temp2
	mov temp2,r20
	clr r20
	sbc r20,temp3
	mov temp3,r20
	clr r20
	sbc r20,temp4
	mov temp4,r20
	ldi r20,1
n15m5_g:
	ldi	r21,low(800)
	ldi	r22,high(800)	;端数切上
	clr temp4
	add	temp1,r21
	adc	temp2,r22
	adc	temp3,temp4
	lsr temp3
	ror temp2
	ror temp1
    	lsr temp3
	ror temp2
	ror temp1
    	lsr temp3
	ror temp2
	ror temp1
    	lsr temp3
	ror temp2
	ror temp1	;temp3:2:1=1600Q/16=100Q
	rcall bindec60	;bin:=temp3:temp2:temp1  dec=r5:r0:r1:r2,r3,r4
	adiw zl,2
	ldi		temp1,' '
	tst		r20
	breq	n15m5_h
	ldi		temp1,'-'
n15m5_h:
	st z+,temp1		;符号
	tst r5
	brne	n15m5_k
	ldi		temp1,0x20
	rjmp	n15m5_l
n15m5_k:	
	ldi	temp1,0x30
	add	temp1,r5
n15m5_l:
	st z+,temp1		;千位
	or r5,r0
	brne	n15m5_m
	ldi		temp1,0x20
	rjmp	n15m5_n
n15m5_m:	
	ldi	temp1,0x30
	add	temp1,r0
n15m5_n:
	st z+,temp1		;百位
	or r5,r1
	brne	n15m5_o
	ldi		temp1,0x20
	rjmp	n15m5_p
n15m5_o:
	ldi	temp1,0x30
	add	temp1,r1
n15m5_p:
	st z+,temp1		;十位
	ldi	temp1,0x30
	add	temp1,r2
	st z+,temp1		;一位

	ldi	lcd_data,0x80
 	rcall	lcd_cmd
	ldi yl,16
	ldiw x,dsp_dat
n15m5_q:
	ld lcd_data,x+
	rcall	lcd_dsp
	dec yl
	brne n15m5_q
	ldi	lcd_data,0xC1
 	rcall	lcd_cmd
	ldi yl,13
	ldiw x,dsp_dat+17
n15m5_r:
	ld lcd_data,x+
	rcall	lcd_dsp
	dec yl
	brne n15m5_r
	rjmp T_C_e1

n15m6:	;p_send:
	ldi yl,7
	ldiw x,dsp_dat
p_send:
	ld temp1,x+
	rcall	Tx
	dec yl
	brne p_send
	rjmp T_C_e1
n15m61:	;Q_send:
	ldi yl,8
	adiw xl,1
q_send:
	ld temp1,x+
	rcall	Tx
	dec yl
	brne q_send
	rjmp T_C_e1
n15m7:	;v_send:
	ldi yl,7
;	adiw xl,1
v_send:
	ld temp1,x+
	rcall	Tx
	dec yl
	brne v_send
	rjmp T_C_e1
n15m8:	;i_send:
	ldi yl,7
;	adiw xl,1
i_send:
	ld temp1,x+
	rcall	Tx
	dec yl
	brne i_send
	ldi temp1,0x0A ;LF
	rcall	Tx
	rjmp T_C_e1
n15m14:
	clr m
	clr n
	sts V,n
	sts V+1,n
	sts I,n
	sts I+1,n
	sts	P,n
	sts	P+1,n
	sts P+2,n
	sts P+3,n
	sts	Q,n
	sts	Q+1,n
	sts Q+2,n
	sts Q+3,n
	ldiw y,Vt
	ldiw z,It
	ldi temp1,1
	rcall wait_ms
	rjmp T_C_e
T_C_e0:
	inc m
	cpi m,12
	brne T_C_e
	clr m
	inc n
	ldiw y,Vt
	ldiw z,It
	rjmp T_C_e	
T_C_e1:
	inc m
T_C_e:
	cbi	PORTB,ck
	reti


;-----------------------------------------------;
; LCD - Send a data/cmd into LCD
	;PORTB   7   6   5   4   3   2    1   0
	;write   -   -   -   -   -  enb r/w  r/s
	;read    -   -   -   -   -   -    -   -
	;PORTD   7   6   5   4   3   2    1   0
	;write   <-data(H/L)->   -   -    -   -
	;read   BF   -   -   -   -   -    -   -

lcd_int:	; Internal reset
	ldi	lcd_data,0x30	; data='0011'
	out	PORTD,lcd_data
	ldi	temp1,0b00000000; RW = "L", RS = "L",E = "L"	
	out	PORTB,temp1	; 
	sbi	PORTB,lcd_enb	; E = "H"
	nop			; I/O delay
	nop			; I/O delay
	nop			; I/O delay
	cbi	PORTB,lcd_enb	; E = "L"
	ret

lcd_dsp:
	rcall	lcd_bfch
	ldi	temp3,0b00000001 ;RW = "L",RS = "H",E = "L",data='xxxx'
	rjmp	lcd_cmd1
lcd_cmd:
	rcall	lcd_bfch
	ldi	temp3,0b00000000 ;RW = "L",RS = "L",E = "L",data='xxxx'
lcd_cmd1:
	mov	temp2,lcd_data
	swap	temp2
	andi	temp2,0xf0	;data_L save

	andi 	lcd_data,0xf0   ;data_H set
	out	PORTD,lcd_data	;data_H
	out	PORTB,temp3
	sbi	PORTB,lcd_enb	; E = "H"
	mov	lcd_data,temp2	; data_L set
	nop
	nop						
	cbi	PORTB,lcd_enb	; E = "L"
	nop			; I/O delay				
	out	PORTD,lcd_data	; data_L
					
	sbi	PORTB,lcd_enb	; E = "H"
	nop			; I/O delay
	nop			; I/O delay
	nop			; I/O delay
	cbi	PORTB,lcd_enb	; E = "L"
	ret

lcd_bfch:
	cbi	DDRD,lcd_db7	; lcd_db7 = INPUT
	sbi	PORTD,lcd_db7	; pullup
	sbi	PORTB,lcd_rw	; RW = "H"
	cbi	PORTB,lcd_rs	; RS = "L"
lcd_bfch1:
	sbi	PORTB,lcd_enb	; E = "H"
	nop			; I/O delay
	nop			; I/O delay
	in	temp1,PIND
	cbi	PORTB,lcd_enb	; E = "L"
	nop
	nop
	sbi	PORTB,lcd_enb	; E = "H"
	nop			; I/O delay
	nop			; I/O delay
	in	temp2,PIND
	cbi	PORTB,lcd_enb	; E = "L"

	andi	temp1,0x80	; Wait until busy flag becomes zero.
	brne	lcd_bfch1
	sbi	DDRD,lcd_db7	; lcd_db7 = OUTPUT
	cbi	PORTD,lcd_db7	; clear
	ret

wait_us:	;base 8MHz	
				;temp1　us (8clocks)
	nop			; 1clocks
	nop			; 1clocks
	nop			; 1clocks
	nop			; 1clocks
	nop			; 1clocks
	dec	temp1		; 1clocks
	brne	wait_us		; 2clocks
	ret
	
wait_ms:	;temp1　ms at 8MHz
	ldi	temp2,100	;80*100=8000clocks
wait_ms_01:
	ldi	temp3,19    	;1clocks  4*(19+1)=80
wait_ms_02:
	nop			; 1clocks
	dec	temp3		; 1clocks
	brne	wait_ms_02	; 2clocks
	dec	temp2		; 1clocks
	brne	wait_ms_01	; 2clocks
	dec	temp1		; 1clocks	
	brne	wait_ms		; 2clocks
	ret
;*********************************************
Tx:
	LDS  r0,UCSR0A
	SBRS r0,UDRE0	;送信ﾊﾞｯﾌｧ空きでｽｷｯﾌﾟ
	RJMP Tx 	;送信ﾊﾞｯﾌｧ空き待機
	STS  UDR0,R16	;ﾃﾞｰﾀ送信(送信開始)
	RET 		;呼び出し元へ復帰
Rx:
	LDS  r0,UCSR0A
	SBRS r0,RXC0	;受信完了でｽｷｯﾌﾟ
	RJMP Rx 	;受信完了待機
	LDS  R16,UDR0	;受信ﾃﾞｰﾀ取得
	RET		;呼び出し元へ復帰
;*********************************************
EEPROM_WR:
	rcall	EEPROM_RD
	cp	temp1,temp2	;同じ値ならスキップ
	brne	EEPROM_WR1
	ret	
EEPROM_WR1:	
	 SBIC	 EECR,EEPE	 ;EEPROM書き込み完了ならばｽｷｯﾌﾟ
	 RJMP	 EEPROM_WR1	 ;以前のEEPROM書き込み完了まで待機
	 OUT	 EEARH,ZH	 ;EEPROMｱﾄﾞﾚｽ上位ﾊﾞｲﾄ設定
	 OUT	 EEARL,ZL	 ;EEPROMｱﾄﾞﾚｽ下位ﾊﾞｲﾄ設定
	 OUT	 EEDR,temp1	 ;EEPROM書き込み値を設定
	 SBI	 EECR,EEMPE	 ;EEPROMﾏｽﾀ書き込み許可ﾋﾞｯﾄ設定
	 SBI	 EECR,EEPE	 ;EEPROM書き込み開始(書き込み許可ﾋﾞｯﾄ設定)
	 RET	 	 	 ;呼び出し元へ復帰
;*********************************************
EEPROM_RD: 
	 SBIC	 EECR,EEPE	 ;EEPROM書き込み完了ならばｽｷｯﾌﾟ
	 RJMP	 EEPROM_RD	 ;以前のEEPROM書き込み完了まで待機
	 OUT	 EEARH,ZH	 ;EEPROMｱﾄﾞﾚｽ上位ﾊﾞｲﾄ設定
	 OUT	 EEARL,ZL	 ;EEPROMｱﾄﾞﾚｽ下位ﾊﾞｲﾄ設定
	 SBI	 EECR,EERE	 ;EEPROM読み出し開始(読み込み許可ﾋﾞｯﾄ設定)
	 IN	 temp2,EEDR	 ;EEPROM読み出し値を取得
	 RET	  	 	 ;呼び出し元へ復帰
;*********************************************

 ;***************************************************************************
; sqrt32  sqrt(r16:r17:r18:r19)=r0:r1
;	  work	r2-r8,r20-r22
;***************************************************************************

sqrt32:	
	clr	r0	;BH	
	clr	r1	;BL
	;clr	r20	;B1H
	;clr	r21	;B2L
	clr	r3	;C=r3:r4:r5:r6
	clr	r4
	clr	r5
	clr	r6
	clr	r7	;W=r7:r8
	clr	r8
	inc	r8
sqrt32_1:
	tst	r16
	breq	sqrt32_2
	ldi	r20,0x80
	clr	r21
	rjmp	sqrt32_5
sqrt32_2: 
	tst	r17
	breq	sqrt32_3
	ldi	r20,0x08
	clr	r21
	mov	r16,r17
	mov	r17,r18
	mov	r18,r19
	clr	r19
	rjmp	sqrt32_5
sqrt32_3: 
	tst	r18
	breq	sqrt32_4
	ldi	r21,0x80
	clr	r20
	mov	r16,r18
	mov	r17,r19
	clr	r18
	clr	r19
	rjmp	sqrt32_5
sqrt32_4: 
	tst	r19
	breq	sqrt32_e
	ldi	r21,0x08
	clr	r20
	mov	r16,r19
	clr	r17
	clr	r18
	clr	r19
sqrt32_5:
	ldi	r22,2
sqrt32_51:
	lsl	r19
	rol	r18
	rol	r17
	rol	r16
	rol	r6
	rol	r5
	rol	r4
	rol	r3
	dec	r22
	brne	sqrt32_51
	clr	r22
	cp	r6,r8	;C:W
	cpc	r5,r7
	cpc	r4,r22
	cpc	r3,r22
	brcs	sqrt32_6	;C<W
	sub	r6,r8		;C>=W
	sbc	r5,r7
	sbc	r4,r22
	sbc	r3,r22
	add	r1,r21
	add	r0,r20
	lsl	r8
	rol	r7
	ldi	r22,3
	add	r8,r22
	ldi	r22,0
	adc	r7,r22
	rjmp	sqrt32_7
sqrt32_6:
	lsl	r8
	rol	r7
	ldi	r22,0
	dec	r8
	sbc	r7,r22
sqrt32_7:
	lsr	r20
	ror	r21
	tst	r20
	brne	sqrt32_5
	tst	r21
	brne	sqrt32_5
sqrt32_e:
	
	ret
;***************************************************************************
;*
;* "bindec" - 16-bit Binary to dec 
;*  bin:=temp2:temp1  dec=r5,r0,r1,r2,r3,r4
;***************************************************************************
bindec60:	;<99999 if 100,0000+ then r5=10+
	clr	r5
	clr r0
bindec61:
	cpi24	temp3,temp2,temp1,100000
	brcs	bindec62
	inc r5
	subi24	temp3,temp2,temp1,100000
	rjmp	bindec61
bindec62:
	tst temp3
	breq	bindec51
	inc r0
	subi24	temp3,temp2,temp1,10000
	rjmp	bindec62
bindec50:	;>9999
	clr	r0
bindec51:
	cpi16	temp2,temp1,10000
	brcs	bindec40
	subi16	temp2,temp1,10000
	inc	r0
	rjmp	bindec51
bindec40:	;>999
	clr	r1
bindec41:
	cpi16	temp2,temp1,1000
	brcs	bindec30
	subi16	temp2,temp1,1000
	inc	r1
	rjmp	bindec41
bindec30:	;>99
	clr	r2
bindec31:
	cpi16	temp2,temp1,100
	brcs	bindec20
	subi16	temp2,temp1,100
	inc	r2
	rjmp	bindec31
bindec20:	;>9
	clr	r3
bindec21:
	cpi	temp1,10
	brcs	bindec10
	subi	temp1,10
	inc	r3
	rjmp	bindec21
bindec10:	;<10
;	clr	r4
	mov	r4,temp1
	ret


