;**** includes **** 2013/12/23 ck=4Mhz
.include "tn2313def.inc"

.macro	ldiw	;	ldiw	Z(X,Y),var
	ldi	@0L,low(@1)
	ldi	@0H,high(@1)
.endm
.macro	stsi
	ldi	r16,@1
	sts	@0,r16
.endm
.macro	sti
	ldi	r16,@1
	st	@0,r16
.endm
.MACRO subi16	;subi16	ra,rb,0xHHHH
                 subi	@1,low(@2)
                 sbci	@0,high(@2)
.ENDMACRO 
.MACRO cpi16	;cpi16	ra,rb,0xHHHH	;ra:rb-0xHHHH	set flags:N,C
		push	@0
		push	@1
		subi	@1,low(@2)
		sbci	@0,high(@2)
cp162:	pop	@1
		pop	@0
.ENDMACRO
.MACRO subi24	;subi24	ra,rb,rc,0xHHHHHH
                 subi	@2,low(@3)
                 sbci	@1,high(@3)
                 sbci	@0,byte3(@3)
.ENDMACRO 
.MACRO cpi24	;cpi24	ra,rb,rc,0xHHHHHH	;ra:rb:rc-0xHHHHHH	set flags:N,C
		push	@0
		push	@1
		push	@2
		subi	@2,low(@3)
		sbci	@1,high(@3)
		sbci	@0,byte3(@3)
		pop	@2
		pop	@1
		pop	@0
.ENDMACRO
;*****************************
;* レジスタ変数　設定 *
;*****************************

.def	temp1	= r16
.def	temp2	= r17
.def	temp3	= r18
.def	temp4	= r19
.def	lcd_dat	= r20
;use r21,22

;*****************************
;*　 ビット　設定　　*
;*****************************

;**  PORTB  ***
.equ	scl		= 0	;sb1602bw
.equ	sda		= 1
;.equ			= 2
;.equ   		= 3
;.equ			= 4
 

.dseg
rx_dat:	.byte 64

;.eseg	;EEPROM add
.cseg
	rjmp	start	 ;各種ﾘｾｯﾄ
	reti; 	 RJMP	 EXT_INT0	 ;外部割り込み要求0
	reti;  	 RJMP	 EXT_INT1	 ;外部割り込み要求1
	reti;    RJMP	 TIM1_CAPT	 ;ﾀｲﾏ/ｶｳﾝﾀ1捕獲発生
	reti;    RJMP	 TIM1_COMPA	 ;ﾀｲﾏ/ｶｳﾝﾀ1比較A一致
	reti;    RJMP	 TIM1_OVF	 ;ﾀｲﾏ/ｶｳﾝﾀ1溢れ
	reti;    RJMP	 TIM0_OVF	 ;ﾀｲﾏ/ｶｳﾝﾀ0溢れ
	rjmp	 USART_RXC	 ;USART 受信完了
	reti;    RJMP	 USART_UDRE	 ;USART 送信ﾊﾞｯﾌｧ空き
	reti;    RJMP	 USART_TX	 ;USART 送信完了
	reti;    RJMP	 ANA_COMP	 ;ｱﾅﾛｸﾞ比較器出力遷移
	reti;    RJMP	 PCINT	 ;ﾋﾟﾝ変化割り込み要求
	reti;    RJMP	 TIM1_COMPB	 ;ﾀｲﾏ/ｶｳﾝﾀ1 比較B一致
	reti;    RJMP	 TIM0_COMPA	 ;ﾀｲﾏ/ｶｳﾝﾀ0 比較A一致
	reti;    RJMP	 TIM0_COMPB	 ;ﾀｲﾏ/ｶｳﾝﾀ0 比較B一致
	reti;    RJMP	 USI_STRT	 ;USI 開始条件検出
	reti;    RJMP	 USI_OVF	 ;USI 計数器溢れ
	reti;    RJMP	 EE_RDY	 ;EEPROM操作可
	reti;    RJMP	 WDT_OVF	 ;ｳｫｯﾁﾄﾞｯｸﾞ計時完了
  
start:
	ldi	 R16,LOW(RAMEND)	;RAM最終ｱﾄﾞﾚｽ下位を取得
	out	 SPL,R16	;ｽﾀｯｸ ﾎﾟｲﾝﾀ(下位)を初期化

	ldi	r16,96
	out OSCCAL,r16

i_o_reset:
	ldi	temp1,0b00000011	
	out	PORTA,temp1	;0-1 pull up
	ldi	temp1,0b00000000
	out	DDRA,temp1	;  in port
	ldi	temp1,0b11111111	
	out	PORTB,temp1	;0-1 H,2-7 pull up
	ldi	temp1,0b00000011
	out	DDRB,temp1	;0-1 out,2-7 in port
	ldi	temp1,0b11111111	
	out	PORTD,temp1	;0-7 pull up
	ldi	temp1,0b00000000
	out	DDRD,temp1	;0-7 in port
	
	cli
USATR_int:
	clr	temp1			;4MHz/[(25+1)x16]-->9600Hz
	out	UBRRH,temp1
	ldi	temp1,25
	out	UBRRL,temp1
	ldi	temp1,(1<<RXEN)|(1<<TXEN)|(1<<RXCIE)	;RXEN：受信許可、TXEN：送信許可,RXCIE:受信完了割り込み許可			
	out	UCSRB,temp1
	ldi temp1,(1<<UCSZ1)|(1<<UCSZ0);ビット長８bit、ストップビット１bit、非同期動作
	out	UCSRC,temp1
			
	; LCD - Initialize LCD controller
lcd_init:
	ldi	temp1,50	; 
	rcall	wait_ms
	ldi	lcd_dat,0b00111000	;function set 
	rcall	lcd_com			;Data=8bit, Line=2, Font=5x7
	ldi	lcd_dat,0b00111001	;function set2 	
	rcall	lcd_com			 ;Data=8bit, Line=2,Font=5x7,IS
	ldi	lcd_dat,0b00010100	;Internal OSC frequency adjustment  
	rcall	lcd_com
	ldi	lcd_dat,0b01111111	;Contrast set 
	rcall	lcd_com		
	ldi	lcd_dat,0b01011111	;Power/ICON/Contrast control
	rcall	lcd_com
	ldi	lcd_dat,0b01101010	;Follower control
	rcall	lcd_com			
	ldi	temp1,220		; Wait for 200ms+
	rcall	wait_ms

	ldi	lcd_dat,0b00111000	;function set 
	rcall	lcd_com			;Data=8bit, Line=2, Font=5x7
	ldi	lcd_dat,0b00001100	;Display ON/OFF
	rcall	lcd_com		
	ldi	lcd_dat,0b00000001	;Clear Display 
	rcall	lcd_com			
	ldi	temp1,3			; Wait for 2ms+
	rcall	wait_ms
	ldi	lcd_dat,0b00000110	;Entry Mode Set 
	rcall	lcd_com	
			
	ldi	lcd_dat,0x82
	rcall	lcd_com
	ldi	lcd_dat,'O'
	rcall	lcd_dsp
	ldi	lcd_dat,'K'
	rcall	lcd_dsp
	ldi	lcd_dat,0x80
	rcall	lcd_com


	ldi temp1,250
	rcall wait_ms
	ldi temp1,250
	rcall wait_ms
	ldi temp1,250
	rcall wait_ms
	ldi temp1,250
	rcall wait_ms
	ldi temp1,250
	rcall wait_ms
	ldi temp1,250
	rcall wait_ms

main:
	SBIS UCSRA,RXC 	;受信完了でｽｷｯﾌﾟ
	rjmp main2
main1:
	IN R16,UDR
	ldi temp1,10
	rcall wait_ms
	rjmp main
main2:
	ldi temp1,250
	rcall wait_ms
	SBIC UCSRA,RXC 	;受信無しでｽｷｯﾌﾟ
	rjmp main1
;	rcall	clr_buf
;	rcall	rx_in
;	rcall clr_dis

	ldiw	z,atis*2
	rcall	send_pack
	rcall clr_dis

	ldiw	z,r_atis*2
	rcall	send_pack
	rcall clr_dis

	ldiw	z,t_re*2
	rcall	send_pack
	rcall clr_dis

	ldiw	z,r_atv*2
	rcall	send_pack
	rcall clr_dis

	ldiw	z,r_atv1*2
	rcall	send_pack

main99:
	rjmp main99

tx_dsp:
	ldiw	y,rx_dat
tx_dsp00:
	clr r24
	clr r14
	ldd	r25,y+2
	subi r25,-4
tx_dsp0:
	ld	r23,y+
	mov r13,r23
	rcall hex_dsp 
	inc r24
	cp	r24,r25
	breq tx_dsp99
	cpi r24,4
	brcs tx_dsp01
	add r14,r13 ;chek sum
tx_dsp01:
	ldi r16,0x07
	and	r16,r24
	brne tx_dsp0
tx_dsp1:
	sbrs r24,3
	rjmp tx_dsp3
tx_dsp2:
	ldi	lcd_dat,0xC0
	rcall	lcd_com
	rjmp tx_dsp0
tx_dsp3:
	rcall clr_dis
	rjmp tx_dsp0		
tx_dsp99:
	ldi	lcd_dat,0b00111001	;function set2 	
	rcall	lcd_com			 ;Data=8bit, Line=2,Font=5x7,IS
	com	r14	;ck_sum=$ff-ck_sum
	cp	r14,r13
	brne tx_dsp100	;ck_sum NG
	ldi	lcd_dat,0x4b;ck_sum OK
	rcall	lcd_com
	clr lcd_dat
	rcall	lcd_dsp
	ldi	lcd_dat,0x44
	rjmp	tx_dsp101
tx_dsp100:
	ldi	lcd_dat,0x44
	rcall	lcd_com
	clr lcd_dat
	rcall	lcd_dsp
	ldi	lcd_dat,0x4b
tx_dsp101:
	rcall	lcd_com	
	ldi	lcd_dat,0x10
	rcall	lcd_dsp
	ldi	lcd_dat,0b00111000	;function set 
	rcall	lcd_com			;Data=8bit, Line=2, Font=5x7
	ld	r23,y
	cpi	r23,0x7E
	brne tx_dsp102
	rcall clr_dis
	rjmp tx_dsp00
tx_dsp102:
	ret

clr_dis:
	sbic	PINA,1
	rjmp clr_dis
	ldi temp1,200
	rcall wait_ms
clr_dis1:
	sbis	PINA,1
	rjmp clr_dis1
	ldi	lcd_dat,0b00000001	;Clear Display 
	rcall	lcd_com			
	ldi	temp1,3			; Wait for 2ms+
	rcall	wait_ms
	ldi	lcd_dat,0x80
	rcall	lcd_com
	ret

clr_buf:
	ldiw	y,rx_dat
	ldi	temp4,64
	clr	temp1
clr_buf1:
	st	y+,temp1
	dec	temp4
	brne	clr_buf1
	ret

send_pack:
	rcall	clr_buf
	ldiw	y,rx_dat
	lpm		temp1,z+
	rcall	tx	;0
	lpm		temp1,z+
	rcall	tx	;1
	lpm		temp1,z+
	rcall	tx	;2
	mov	temp4,temp1
s_l:
	lpm		temp1,z+
	rcall	tx	
	subi	temp4,1
	brcc	s_l
rx_in:
	sei
end_ck:
	ldi temp1,100
	rcall wait_ms
	SBIC UCSRA,RXC 	;受信無しでｽｷｯﾌﾟ
	rjmp end_ck
	cli
	rcall tx_dsp
	ret


start_c:
	sbi	PORTB,scl
	ldi	temp1,5
	rcall	wait_us
	cbi	PORTB,sda
	ldi	temp1,10
	rcall	wait_us
	ret
stop_c:
	cbi	PORTB,scl
	ldi	temp1,2
	rcall	wait_us
	cbi	PORTB,sda
	ldi	temp1,2
	rcall	wait_us
	sbi	PORTB,scl
	ldi	temp1,5
	rcall	wait_us
	sbi	PORTB,sda
	ret

send_dat0:	;re_start
	ser r21
	rjmp s_d0
send_dat:
	clr r21
s_d0:
	ldi	temp4,8
s_d1:
	cbi	PORTB,scl
	ldi	temp1,1
	rcall	wait_us	
	lsl	temp3
	brcs	s_d2
	cbi	PORTB,sda
	rjmp	s_d3
s_d2:
	sbi	PORTB,sda
s_d3:
	ldi	temp1,3
	rcall	wait_us
	sbi	PORTB,scl
	ldi	temp1,4
	rcall	wait_us	
	dec	temp4
	brne	s_d1
s_d4:
	cbi	PORTB,scl
	nop
	cbi	DDRB,sda	;input
	ldi	temp1,4
	rcall	wait_us
	tst r21
	brne s_d5
	cbi	PORTB,sda
	rjmp s_d6
s_d5:
	sbi	PORTB,sda
s_d6:
	sbi	DDRB,sda	;output
	sbi	PORTB,scl
	ldi	temp1,4
	rcall	wait_us
	ret

read_dat:
	ldi	temp4,8
	clr temp3
r_d1:
	cbi	PORTB,scl
	ldi	temp1,4
	rcall	wait_us
	sbi	PORTB,scl
	cbi	DDRB,sda	;input			
	ldi	temp1,2
	rcall	wait_us
	clc
	sbic PINB,sda
	sec
	rol	temp3
	ldi	temp1,1
	rcall	wait_us
	dec	temp4
	brne	r_d1
	cbi	PORTB,scl
	ldi	temp1,1
	rcall	wait_us
	sbi	DDRB,sda	;output
	tst r21
	breq r_d2
	sbi	PORTB,sda
	rjmp	r_d3
r_d2:
	cbi	PORTB,sda
r_d3:
	ldi	temp1,3
	rcall	wait_us
	sbi	PORTB,scl
	ldi	temp1,4
	rcall	wait_us
	ret

lcd_dsp:
	ldi	r22,0x40
	rjmp lcd_com1
lcd_com:
	ldi	r22,0x00
lcd_com1:
	rcall	start_c
	ldi	temp3,0b01111100	;SLA_W
	rcall	send_dat

	mov	temp3,r22	
	rcall send_dat

	mov	temp3,lcd_dat
	rcall send_dat
	rcall	stop_c
	ldi	temp1,50	; Wait for 26.3us+
	rcall	wait_us	
	ret

hex_dsp:
	mov	r15,r23
	andi	r23,0xf0
	swap	r23
	cpi	r23,10
	brcc	hex_dsp1
	ldi	lcd_dat,0x30
	rjmp	hex_dsp2
hex_dsp1:
	ldi	lcd_dat,0x37
hex_dsp2:
	add	lcd_dat,r23
	rcall	lcd_dsp
	mov	r23,r15
	andi	r23,0x0f
	cpi	r23,10
	brcc	hex_dsp3
	ldi	lcd_dat,0x30
	rjmp	hex_dsp4
hex_dsp3:
	ldi	lcd_dat,0x37
hex_dsp4:
	add	lcd_dat,r23
	rcall	lcd_dsp
	ret

tx:
	SBIS UCSRA,UDRE 	;送信ﾊﾞｯﾌｧ空きでｽｷｯﾌﾟ
	RJMP tx 		;送信ﾊﾞｯﾌｧ空き待機
	OUT UDR,R16 	;ﾃﾞｰﾀ送信(送信開始)
	RET 		;呼び出し元へ復帰

rx:
	SBIS UCSRA,RXC 	;受信完了でｽｷｯﾌﾟ
	RJMP rx 		;受信完了待機
	IN R16,UDR 	;受信ﾃﾞｰﾀ取得
	RET		;呼び出し元へ復帰
USART_RXC:
	in	r19,sreg
	push r19
	IN R23,UDR 	;受信ﾃﾞｰﾀ取得
	st	y+,r23
;rcall hex_dsp 
	pop r19
	out sreg,r19
	reti

;*********************************************
wait_us:	;base 4MHz	
				;temp1　us (4clocks)
	nop			; 1clocks
	dec	temp1		; 1clocks
	brne	wait_us		; 2clocks
	ret
;*********************************************	
wait_ms:	;temp1　ms at 4MHz
	ldi	temp2,50	;80*50=4000clocks
wait_ms_01:
	ldi	temp3,19    	;1clocks  4*(19+1)=80
wait_ms_02:
	nop			; 1clocks
	dec	temp3		; 1clocks
	brne	wait_ms_02	; 2clocks
	dec	temp2		; 1clocks
	brne	wait_ms_01	; 2clocks
	dec	temp1		; 1clocks	
	brne	wait_ms		; 2clocks
	ret


;***************************************************************************
;*
;* "bindec" - 16-bit Binary to dec 
;*  bin:=temp2:temp1  dec=r1,r2,r3,r4
;***************************************************************************
bindec40:	;>999
	clr	r1
bindec41:
	cpi16	temp2,temp1,1000
	brcs	bindec30
	subi16	temp2,temp1,1000
	inc	r1
	rjmp	bindec41
bindec30:	;>99
	clr	r2
bindec31:
	cpi16	temp2,temp1,100
	brcs	bindec20
	subi16	temp2,temp1,100
	inc	r2
	rjmp	bindec31
bindec20:	;>9
	clr	r3
bindec21:
	cpi	temp1,10
	brcs	bindec10
	subi	temp1,10
	inc	r3
	rjmp	bindec21
bindec10:	;<10
;	clr	r4
	mov	r4,temp1
	ret

;API_com		
atis: .db 0x7E,0x00,0x04,0x08,0x01,0x49,0x53,0x5A
r_atis: .db 0x7E ,0x00 ,0x0D ,0x07 ,0x01 ,0x00 ,0x00 ,0x00 ,0x00 ,0xC0,0xA8  ,0x00 ,0x05 ,0x02 ,0x49 ,0x53 ,0xEC,0
t_re: .db 0x7E ,0x00 ,0x0F ,0x00 ,0x01 ,0x00 ,0x00 ,0x00 ,0x00 ,0xC0 ,0xA8 ,0x00 ,0x05 ,0x00 ,0x78 ,0x62 ,0x65 ,0x65 ,0xED,0
r_atv: .db 0x7E ,0x00 ,0x0D ,0x07 ,0x01 ,0x00 ,0x00 ,0x00 ,0x00 ,0xC0 ,0xA8 ,0x00 ,0x06 ,0x02 ,0x25 ,0x56 ,0x0C,0
r_atv1: .db 0x7E ,0x00 ,0x0D ,0x07 ,0x01 ,0x00 ,0x00 ,0x00 ,0x00 ,0xC0 ,0xA8 ,0x00 ,0x02 ,0x02 ,0x25 ,0x56 ,0x10,0